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| 1/16 www.rohm.com 2010.04 - rev.c c 2010 rohm co., ltd. all rights reserved. single-chip type with built-in fet switching regulator series output 1.5a or less high efficiency step-down switching regulator with built-in power mosfet BD9152MUV description rohms high efficiency dual step-down switching regulator BD9152MUV is a power supply designed to produce a low voltage including 3.3,0.8 volts fr om 5.5/4.5 volts power supply line. offers hi gh efficiency with our original pulse skip cont rol technology and synchronous rectifier. employs a current m ode control system to provide faster transient response to sudden change in load. features 1) offers fast transient response with current mode pwm control system. 2) offers highly efficiency for all load range with synchronous rectifier (pch/nch fet) and sllm tm (simple light load mode) 3) incorporates soft-start function. 4) incorporates thermal protection and ulvo functions. 5) incorporates short-current protec tion circuit with time delay function. 6) incorporates shutdown function icc=0 a(typ.) 7) employs small surface mount package : vqfn020v4040 application power supply for lsi including dsp, micro computer and asic absolute maximu m rating (ta=25 ) paramete r s y mbol limit unit vcc volta g e v cc -0.3 +7 * 1 v en voltage v en1 -0.3 +7 v v en2 -0.3 +7 v sw voltage v sw1 -0.3 +7 v v sw2 -0.3 +7 v power dissipation pd1 0.34* 2 w pd2 0.70 * 3 w pd3 1.21 * 4 w pd4 3.56* 5 w operating temperature range topr -40 +85 storage temperature range tstg -55 +150 maximum junction temperature tjmax +150 *1 pd should not be exceeded. *2 ic only *3 1-layer. mounted on a 74.2mm 74.2mm 1.6mm glass-epoxy board, occupied area by copper foil : 10.29mm2 *4 4-layer. mounted on a 74.2mm 74.2mm 1.6mm glass-epoxy board, occupied area by copper foil : 10.29mm2 , in each layers *5 4-layer. mounted on a 74.2mm 74.2mm 1.6mm glass-epoxy board, occupied area by copper foil : 5505mm2, in each layers operating conditions (ta=-40 +105 ) parameter symbol limit unit min. t y p. max. vcc volta g e v cc 4.5 5.0 5.5 v en voltage v en 1 0 - 5.5 v v en 2 0 - 5.5 v output voltage range v out 2 0.8 - 2.5 v sw average output current i sw 1 - - 1.5* 6 a i sw 2 - - 1.5* 6 a *6 pd and aso should not be exceeded. no.10027ect14 downloaded from: http:///
BD9152MUV technical note 2/16 www.rohm.com 2010.04 - rev.c c 2010 rohm co., ltd. all rights reserved. electrical characteristics (ta=25 vcc=5v, en1=en2=vcc ,unless otherwise specified.) parameter symbol limit unit condition min. typ. max. standby current i stb - 0 10 a en1=en2=0v bias current i cc - 500 800 a en low voltage v enl - gnd 0.8 v standby mode en high voltage v enh 2 vcc - v active mode en input current i en - 1 10 a en1=en2=2v oscillation frequency f osc 0.8 1.0 1.2 mhz pch fet on resistance r onp 1 - 0.17 0.3 ? vcc=5v r onp 2 - 0.17 0.3 ? vcc=5v nch fet on resistance r onn 1 - 0.13 0.2 ? vcc=5v r onn 2 - 0.13 0.2 ? vcc=5v fb reference voltage fb1 3.25 3.3 3.35 v 1.5% fb2 0.788 0.8 0.812 v 1.5% uvlo threshold voltage1 v uvlol 1 3.6 3.8 4.0 v vcc=5 0v uvlo release voltage1 v uvloh 1 3.65 3.9 4.2 v vcc=0 5v uvlo threshold voltage2 v uvlol 2 2.4 2.5 2.6 v vcc=5 0v uvlo release voltage2 v uvloh 2 2.425 2.55 2.7 v vcc=0 5v fb1 discharge resistance r fb 1 - 20 40 ? vcc=5v soft start time t ss 0.4 0.8 1.6 ms timer latch time t latch 1.0 2.0 4.0 ms scp/tsd on output short circuit threshold voltage v scp 1 - 1.65 2.4 v fb1=3.3 0v v scp 2 - 0.4 0.56 v fb2=0.8 0v downloaded from: http:/// BD9152MUV technical note 3/16 www.rohm.com 2010.04 - rev.c c 2010 rohm co., ltd. all rights reserved. block diagram, application circuit BD9152MUV pin no. & function table pin no. pin name function pin no. pin name function 1 pgnd2 ch2 lowside source pin 11 ith1 ch1 gmamp output pin/ connected phase compensation capacitor 2 pvcc highside fet source pin 12 agnd ground 3 pvcc highside fet source pin 13 n.c. non connection 4 pvcc highside fet source pin 14 avcc vcc power supply input pin 5 pgnd1 ch1 lowside source pin 15 ith2 ch1 gmamp output pin/connected phase compensation capacitor 6 pgnd1 ch1 lowside source pin 16 fb2 ch2 output voltage detect pin 7 sw1 ch1 pch/nch fet drain output pin 17 en2 ch2 enable pin(high active 8 sw1 ch1 pch/nch fet drain output pin 18 sw2 ch2 pch/nch fet drain output pin 9 en1 ch1 enable pin(high active) 19 sw2 ch2 pch/nch fet drain output pin 10 fb1 ch1 output voltage detect pin 20 pgnd2 ch2 lowside source pin fig.2 BD9152MUV block diagram fig.1 BD9152MUV top view (unit : mm) 2.1 0.1 c0.2 0.5 1.0 15 610 11 15 16 20 4.0 0.1 4.0 0.1 2.1 0.1 0.4 0.1 0.25 +0.05 -0.04 0.02 +0.03 -0.02 1.0max. (0.22) 0.08 s s d9152 lot no. current sense/ protect + driver logic soft start1 slope1 rs q osc vref scp/ tsd scp2 current sense/ protect + driver logic soft start2 slope2 rs q scp1 clk2 gm amp current comp gm amp current comp clk1 clk2 uvlo1 fb1 en1 fb2 en2 pv cc sw1 pgnd2 sw2 agnd ith1 ith2 a gnd pv cc pgnd1 uvlo2 en1 downloaded from: http:/// BD9152MUV technical note 4/16 www.rohm.com 2010.04 - rev.c c 2010 rohm co., ltd. all rights reserved. characteristics data 0 25 50 75 100 125 150 175 200 -40 -20 0 20 40 60 80 100 temperature:ta[ ] on resistance:r on [m ] 0 10 20 30 40 50 60 70 80 90 100 10 100 1000 10000 output current:i out [ma] efficiency: [%] 0.7 0.8 0.9 1 1.1 4.5 4.75 5 5.25 5.5 input voltage:v cc [v] frequency:f osc [mhz] fi g .10 vcc-fosc 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 01234 output current:i out [a] output voltage:vout[v] vout2=1.2v vout2=1.2v vcc=5v ta = 2 5 ta = 2 5 io=1.5a vcc=5v ta = 2 5 io=0a vout2=1.2v 3.20 3.25 3.30 3.35 3.40 -40 -20 0 20 40 60 80 temperature:ta[ ] output voltage:vout[v] vcc=5v io=0a vout1=3.3v 0.0 0.2 0.4 0.6 0.8 1.0 1.2 -40-20 0 20406080 temperature:ta[ ] frequency:f osc [mhz] vcc=5v fig.9 ta- fosc fig.8 efficiency fig. 6 ta-vout1 fig.3 vcc C vout1,vout2 fig.5 iout - vout fig.4 ven - vout fig.11 ta C ronn, ronp 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 012345 input voltage:v cc [v] output voltage:vout[v] 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 012345 en voltage:ven[v] output voltage:vout[v] fig. 7 ta-vout2 vout2=1.2v O 1.15 1.18 1.20 1.23 1.25 -40 -20 0 20 40 60 80 temperature:ta[ ] output voltage:vout[v] vcc=5v ta = 2 5 vout1=3.3v vout2=2.5v vout2=1.5v vout2=1.2v vout2=1.0v ta = 2 5 pmos nmos vcc=5v vout1=3.3v vout1=3.3v vout1=3.3v vout2=1.2v vcc=5v io=0a 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 -40-20 0 20406080 temperature:ta[ ] en voltage:ven[v] 0 100 200 300 400 500 600 -40-20 0 20406080 temperature:ta[ ] circuit current:i cc [ a] vcc=5v fig.12 ta en1,en2 fig.13 ta icc vcc=5v fig.14 soft start wave form (io=0ma) en1=e2 vout1 vout2 vcc=5v,ta=25 downloaded from: http:/// BD9152MUV technical note 5/16 www.rohm.com 2010.04 - rev.c c 2010 rohm co., ltd. all rights reserved. characteristics data fig.15 soft start wave form (io=1.5a) fig.16 sw1 wave form (io=0ma) fig.17 sw1 wave form (io=1.5a) fig.18 sw2 wave form (io=0ma) fig.19 sw2 wave form (io=1.5a) fig.20 vout1 transient responce (io0.5a 1.5a / usec) fig.21 vout1 transient responce (io1.5a 0.5a/ usec) fig.23 vout2 transient responce (io1.5a 0.5a/ usec) fig.22 vout2 transient responce (io0.5a 1.5a/ usec) vcc=5v,ta=25 vcc=5v,ta=25 vcc=5v,ta=25 ,vout2=1.2v vcc=5v,ta=25 ,vout2=1.2v vcc=5v,ta=25 ,vout2=1.2v vcc=5v,ta=25 ,vout2=1.2v vcc=5v,ta=25 vcc=5v,ta=25 en1=e2 vout1 vout2 vout1 sw1 vout1 sw1 vout2 sw2 iout1 vout1 iout2 vout2 iout2 vout2 vcc=5v,ta=25 downloaded from: http:/// BD9152MUV technical note 6/16 www.rohm.com 2010.04 - rev.c c 2010 rohm co., ltd. all rights reserved. information on advantages advantage 1 offers fast transient response with current mode control system. fig.24 transient response advantage 2 offers high efficiency for all load range. ? for lighter load: utilizes the current mode control mode called sllm for lighter load, which reduces various dissipation such as switching dissipation (p sw ), gate charge/discharge dissipation, esr dissipation of output capacitor (p esr ) and on-resistance dissipation (p ron ) that may otherwise cause degradation in efficiency for lighter load. achieves efficiency improvement for lighter load. ? for heavier load: utilizes the synchronous rectifying mode and the low on-re sistance mos fets incorporated as power transistor. on resistance of highside mos fet : 170m (typ.) on resistance of lowside mos fet : 130m (typ.) achieves efficiency improvement for heavier load. offers high efficiency for all load range with the improvements mentioned above. advantage 3 ? supplied in smaller package due to small-sized power mos fet incorporated. reduces a mounting area required. fig.26 example application fig.25 efficiency conventional product (load response i o =0.5a 1.5a) BD9152MUV (load response i o =1.5a 0.5a) ? output capacitor co required for current mode control: 22 f ceramic capacitor ? inductance l required for the oper ating frequency of 1 mhz: 2.2 h inductor ? incorporates fet + boot strap diode 0.001 0.01 0.1 1 0 50 100 pwm sllm inprovement by sllm system improvement by synchronous rectifier efficiency [%] output current io[a] vout1 iout vout1 iout 15mm 20mm cith1 l1 r1 rith1 cin1 cout1 cout2 l2 r2 cith2 rith2 l1 vout1 ith1 fb1 en1 sw1 sw1 agnd pgnd1 pvc c cout1 cin1 pgnd1 rith1 l2 fb2 en2 sw2 sw2 n.c . avcc ith2 pvc c pvc c pgnd2 vout2 r2 r1 cin2 cout2 pgnd2 rith2 downloaded from: http:/// BD9152MUV technical note 7/16 www.rohm.com 2010.04 - rev.c c 2010 rohm co., ltd. all rights reserved. operation BD9152MUV is a synchronous rectifying step-down switching regu lator that achieves faster transient response by employing current mode pwm control system. it utiliz es switching operation in pwm (pulse width modulation) mode for heavier load, while it utilizes sllm (simple light load mode) operation for lighter load to improve efficiency. synchronous rectifier it does not require the power to be dissipated by a rectifier externally connected to a conventional dc/dc converter ic, and its p.n junction shoot-through protection circuit limits the shoot-through current during operation, by which the power dissipation of the set is reduced. current mode pwm control synthesizes a pwm control signal with a inductor current feedback loop added to the voltage feedback. ? pwm (pulse width modulation) control the oscillation frequency for pwm is 1 mhz. set signal form osc turns on a highside mos fet (while a lowside mos fet is turned off), and an inductor current i l increases. the current comparator (c urrent comp) receives two signals, a current feedback control signal (sense: voltage converted from i l ) and a voltage feedback control signal (fb), and issues a reset signal if both input signals are identical to each other, and turns off the highside mos fet (while a lowside mos fet is turned on) for the rest of the fixed period. the pwm control repeat this operation. ? sllm (simple light load mode) control when the control mode is shifted from pwm for heavier load to the one for lighter load or vise versa, the switching pulse is designed to turn off with the device held operated in norma l pwm control loop, which allows linear operation without voltage drop or deterioration in transient response during the mo de switching from light load to heavy load or vise versa. although the pwm control loop continues to operate with a set signal from osc and a reset signal from current comp, it is so designed that the reset signal is held issued if shifted to the light load mode, with which the switching is tuned off and the switching pulses are thinned out under control. activating the switch ing intermittently reduces the switching dissipation and improves the efficiency. fig.27 diagram of current mode pwm control osc level shift driver logic rqs i l sw ith current comp gm amp. set reset fb load sense v out v out fi g. 28 pwm sw i tc hi ng t i m i ng c h art fig.29 sllm tm switching timing chart curren t comp set reset sw v out pvcc gnd gnd gnd i l (ave) v out (ave) sense fb curren t comp set reset sw v out pvcc gnd gnd gnd 0a v out (ave) sense fb i l not switching i l downloaded from: http:/// BD9152MUV technical note 8/16 www.rohm.com 2010.04 - rev.c c 2010 rohm co., ltd. all rights reserved. description of operations ? soft-start function en terminal shifted to high activates a soft-starter to gradually establish the output voltage with the current limited durin g startup, by which it is possible to prevent an ov ershoot of output voltage and an inrush current. ? shutdown function with en terminal shifted to low, the device turns to standby mode, and all the function blocks including reference voltage circuit, internal oscillator and drivers are turned to off. circuit current during standby is 0f (typ.). ? uvlo function detects whether the input voltage sufficient to secure the output voltage of this ic is supplied. and the hysteresis width of 50mv (typ.) is provided to prevent output chattering. each the outputs have uvlo. it is possible to set output sequence easy. fig.30 soft start, shutdown, uvlo timing chart vcc en1,2 vout2 hysteresis 100mv tss uvlo2 hysteresis 50mv uvlo1 ch1, ch2 standby mode ch1, ch2 operating mode uvlo1 ch1 : standby mode ch2 : operating mode uvlo1 tss vout1 discharge on tss tss tss tss uvlo2 ch1 standby mode ch2 standby mode ch1, ch2 operating mode en en natural discharge natural discharge natural discharge standby mode ch1, ch2 operating mode uvlo1 uvlo2 ch1 standby mode ch2 standby mode discharge on discharge on discharge on downloaded from: http:/// BD9152MUV technical note 9/16 www.rohm.com 2010.04 - rev.c c 2010 rohm co., ltd. all rights reserved. ? short-current protection circuit with time delay function turns off the output to protect the ic fr om breakdown when the incorporated current limiter is activated continuously for the fixed time(t latch ) or more. the output thus held tuned off may be recovered by restarting en or by re-unlocking uvlo. fig.31 short-current protection circuit with time delay timing chart switching regulator efficiency efficiency ? may be expressed by the equation shown below: efficiency may be improved by reducing the swit ching regulator power dissipation factors p d as follows: dissipation factors: 1) on resistance dissipation of inductor and fet pd(i 2 r) 2) gate charge/discharge dissipation pd(gate) 3) switching dissipation pd(sw) 4) esr dissipation of capacitor pd(esr) 5) operating current dissipation of ic pd(ic) 1)pd(i 2 r)=i out 2 (r coil +r on ) (r coil [ ] dc resistance of inductor, r on [ ] on resistance of fet, i out [a] output current.) 2)pd(gate)=cgs f v (cgs[f] gate capacitance of fet, f[h] switching frequency, v[v] gate driving voltage of fet) 4)pd(esr)=i rms 2 esr (i rms [a] ripple current of capacitor, esr[ ] equivalent series resistance.) 5)pd(ic)=vin i cc (i cc [a] circuit current.) = v out i out vin iin 100[%]= p out pin 100[%]= p out p out +p d 100[%] vin 2 c rss i out f i drive 3)pd(sw)= (c rss [f] reverse transfer capacitance of fet, i drive [a] peak current of gate.) output short circuit threshold voltage i l limi t en timer latch en standby mode operating mode operating mode standby mode en1 en2 t2=t latch v out2 i l1 t1 BD9152MUV technical note 11/16 www.rohm.com 2010.04 - rev.c c 2010 rohm co., ltd. all rights reserved. selection of components externally connected 1. selection of inductor (l) current exceeding the current rating of the inductor results in magnetic saturation of the inductor, which decreases efficiency . the inductor must be selected allowing sufficient margin with which the peak current may not exceed its current rating. if v cc =5.0v, v out =1.2v, f=1.0mhz, i l =0.3 1.5a=0.45a, for example,(BD9152MUV) select the inductor of low resistance component (such as dcr and acr) to minimize dissipation in the inductor for better efficiency. 2. selection of output capacitor (c o ) 3. selection of input capacitor (cin) a low esr 22 f/10v ceramic capacitor is recommended to reduce esr di ssipation of input capacitor for better efficiency. the inductance significantly depe nds on output ripple current. a s seen in the equation (1), the ripple current decreases as the inductor and/or switching frequency increases. i l = (v cc -v out ) v out l v cc f [a] ??? ( 1 ) a ppropriate ripple current at output should be 20% more or less of the maximum out p ut current. i l =0.2 i out max. [a] ??? (2) l= (v cc -v out ) v out i l v cc f [h] ??? ( 3 ) ( i l : output ripple current, and f: switching frequency) output capacitor should be selected with the consideration on the stability region and the equivalent series resistance re quired to smooth ripple voltage. output ripple voltage is determined by the equation (4) v out = i l esr [v] ??? (4) ( i l : output ripple current, esr: equivalent series resistance of output capacitor) rating of the capacitor should be determined allowing sufficient margin against output voltage. a 22 f to 100 f ceramic capacitor is recommended. less esr allows reduction in output ripple voltage. input capacitor to select must be a low esr capacitor of the capacitance sufficient to cope with high ripple current to prevent high transient voltage. the ripple current irms is given by the equation (5): i rms =i out v out ( v cc -v out ) v cc [a] ??? ( 5 ) when vcc=2 v out , i rms = i out 2 fig.34 output capacitor ( 5-1.2 ) 1.2 0.45 5 1.0m l= =2.02 2.2[ h] < worst case > i rms(max.) i rms =2 1.8 ( 5.0-1.8 ) 5.0 =0.48 [ a rms ] fig.35 input capacitor i l v out fig.33 output ripple current i l v cc il l co v cc l co v out esr v out v cc l co cin if v cc =5.0v, v out =1.8v, and i outmax.= 1.5a, (BD9152MUV) downloaded from: http:/// BD9152MUV technical note 12/16 www.rohm.com 2010.04 - rev.c c 2010 rohm co., ltd. all rights reserved. 4. determination of rith, cith that works as a phase compensator as the current mode control is designed to limit a inductor current, a pole (phase lag) appears in the low frequency area due to a cr filter consisting of a output capacitor and a load resistance, while a zero (phase lead) appears in the high frequency area due to the output capacitor and its esr. so, the phases are easily compensated by adding a zero to the power amplifier output with c and r as described bel ow to cancel a pole at the power amplifier. stable feedback loop may be achieved by canceling the pole fp (mi n.) produced by the output ca pacitor and the load resistance with cr zero correction by the error amplifier. gain [db] phase [deg] fig.36 open loop gain characteristics a 00 -90 a 00 -90 fz(amp.) fig.37 error amp phase compensation characteristics fp= 2 r o c o 1 fz (esr) = 2 e sr c o 1 pole at power amplifie r when the output current decreases, the load resistance ro increases and the pole frequency lowers. fp (min.) = 2 r omax. c o 1 [hz] with lighter load fp (max.) = 2 r omin. c o 1 [hz] with heavier load zero at power amplifier fz (amp.) = 2 r ith c ith 1 fig.38 typical application fz (amp.) = fp (min.) 2 r ith c ith 1 = 2 r omax. c o 1 fp(min.) fp(max.) fz(esr) i out min. i out max. gain [db] phase [deg] increasing capacitance of the out put capacitor lowers the pole frequency while the zero frequency does not change. (this is because when the capacitance is doubled, the capacitor esr reduces to half.) l1 vout1 ith1 fb1 en1 sw1 sw1 agnd pgnd1 pvcc cout1 cin1 pgnd1 rith1 l2 fb2 en2 sw2 sw2 n.c . avcc ith2 pvc c pvc c pgnd2 vout2 r2 r1 cin2 cout2 pgnd2 rith2 cith2 cith 1 ro2 ro1 esr downloaded from: http:/// BD9152MUV technical note 13/16 www.rohm.com 2010.04 - rev.c c 2010 rohm co., ltd. all rights reserved. 5. determination of vout2 output voltage the output voltage vout2 is det ermined by the equation (6): vout2=(r2/r1+1) v fb2 ??? (6) v fb2 : voltage at adj terminal (0.8v typ.) with r1 and r2 adjusted, the output vo ltage may be determined as required. adjustable output voltage range : 0.8v 2.5v fig.39 determination of output voltage use 1 k ? 100 k ? resistor for r1. if a resistor of the resistance higher than 100 k ? is used, check the assembled set carefully for ripple voltage etc. BD9152MUV cautions on pc board layout fig.40 layout diagram lay out the input ceramic capacitor cin closer to the pins pvcc and pgnd, and the output capacitor co closer to the pin pgnd. lay out cith and rith between the pi ns ith and gnd as neat as possible with least necessary wiring. vqfn020v4040 (BD9152MUV) has thermal pad on the reverse of the package. the package thermal performance may be enhanced by bonding the pad to gnd plane which take a large area of pcb. sw2 fb2 l2 cout2 r2 r1 vout2 l2 l1 vout1 ith1 fb1 en1 sw1 sw1 fb2 en2 sw2 sw2 agnd n.c. avcc ith2 pgnd1 pvc c pvc c pvc c pgnd2 vout2 c out 1 c in 1 r2 r 1 c in 2 c out 2 pgnd2 r ith2 c ith2 pgnd1 r ith1 c ith1 downloaded from: http:/// BD9152MUV technical note 14/16 www.rohm.com 2010.04 - rev.c c 2010 rohm co., ltd. all rights reserved. recommended components lists on above application symbol part value manufacturer series l1,2 coil 2.2uh tdk ltf5022-2r2n3r2 c in1, c in2 ceramic capacitor 22uf murata grm32eb11a226ke20 c out1, c out2 ceramic capacitor 22uf murata grm31cb30j226ke18 c ith1 ceramic capacitor 680pf murata grm18 series r ith1 resistance 82k rohm mcr03 series c ith2 ceramic capacitor vout2=0.8v 680pf murata grm18 series vout2=1.0v 680pf murata grm18 series vout2=1.2v 680pf murata grm18 series vout2=1.5v 680pf murata grm18 series vout2=1.8v 680pf murata grm18 series vout2=2.5v 680pf murata grm18 series r ith2 resistance vout2=0.8v 12k rohm mcr03 series vout2=1.0v 12k rohm mcr03 series vout2=1.2v 15k rohm mcr03 series vout2=1.5v 15k rohm mcr03 series vout2=1.8v 33k rohm mcr03 series vout2=2.5v 82k rohm mcr03 series the parts list presented above is an example of recommende d parts. although the parts are sound, actual circuit characteristics should be checked on your application carefu lly before use. be sure to allow sufficient margins to accommodate variations between external devices and this ic when employing the depicted circuit with other circuit constants modified. both static and transient characteristics should be considered in establishing these margins. when switching noise is substantial and may im pact the system, a low pass filter should be inserted between the vcc and pvcc pins, and a schottky barrier diode or snubber established between the sw and pgnd pins. i/o equivalence circuit fig.41 i/o equivalence circuit en1,en2 ? en1,en2 pin ? sw1,sw2 pv cc sw1,sw2 pv cc pv cc ith1,ith2 ? ith1,ith2 pin a v cc ? fb1,fb2 pin fb1,fb2 downloaded from: http:/// BD9152MUV technical note 15/16 www.rohm.com 2010.04 - rev.c c 2010 rohm co., ltd. all rights reserved. notes for use 1. absolute ma ximum ratings while utmost care is taken to quality control of this pr oduct, any application that may exceed some of the absolute maximum ratings including the voltage applied and the operat ing temperature range may result in breakage. if broken, short-mode or open-mode may not be identif ied. so if it is expected to encounter with special mode that may exceed the absolute maximum ratings, it is requested to take necessary sa fety measures physically including insertion of fuses. 2. electrical potential at gnd gnd must be designed to have the lowest elec trical potential in any operating conditions. 3. short-circuiting between terminals, and mismounting when mounting to pc board, care must be taken to avoid mistak e in its orientation and alignment. failure to do so may result in ic breakdown. short-circuiting due to forei gn matters entered between output terminals, or between output and power supply or gnd may also cause breakdown. 4. thermal shutdown protection circuit thermal shutdown protection circuit is the circuit designed to isolate the ic from thermal runaway, and not intended to protect and guarantee the ic. so, the ic the thermal shutdown protection circui t of which is once activated should not be used thereafter for any operation originally intended. 5. inspection with the ic set to a pc board if a capacitor must be connected to the pin of lower impeda nce during inspection with the ic set to a pc board, the capacitor must be discharged after each process to avoid stress to the ic. for electrostatic protection, provide proper grounding to assembling processes with special care taken in handling and storage. when connecting to jigs in the inspection process, be sure to turn off the power supply before it is connected and removed. 6. input to ic terminals this is a monolithic ic with p+ isolation between p-substrate and each element as illustrated below. this p-layer and the n-layer of each element form a p-n junction, and various parasitic element are formed. if a resistor is joined to a transistor terminal as shown in fig 42. p-n junction works as a parasitic diode if t he following relationship is satisfied; gnd>terminal a (at resistor side), or gnd>terminal b (at transistor side); and if gnd>terminal b (at npn transistor side), a parasitic npn transistor is activated by n-layer of ot her element adjacent to the above-mentioned parasitic diode. the structure of the ic inevitably forms parasitic elements, the activation of which may cause interference among circuits, and/or malfunctions contributing to breakdown . it is therefore requested to take care not to use the device in such manner that the voltage lowe r than gnd (at p-substrate) may be applied to the input terminal, which may result in activation of parasitic elements. fig.42 simplified structure of monorisic ic 7. ground wiring pattern if small-signal gnd and large-current gnd ar e provided, it will be recommended to separate the large-current gnd pattern from the small-signal gnd pattern and establish a single ground at the re ference point of the set pcb so that resistance to the wiri ng pattern and voltage fluctuations due to a large current will caus e no fluctuations in voltages of the small-signal gnd. pay attention not to cause fluctuations in the gn d wiring pattern of external parts as well. 8 . selection of inductor it is recommended to use an inductor with a series resistance element (dcr) 0.15 or less. note that use of a high dcr inductor will cause an inductor loss, resulting in decreased output voltage. should this condition continue for a specified period (soft start time + timer latch time), output short circ uit protection will be activated and output will be latched off. when using an inductor over 0.15 , be careful to ensure adequate margins for variation between external devices and this ic, including transient as well as static characteristics. resistor transistor (npn) n n n p + p + p p substrate gnd parasitic element pin a n n p + p + p p substrate gnd parasitic element c b e n gnd pin a p aras iti c element pin b other adjacent elements e b c gnd p aras iti c element downloaded from: http:/// BD9152MUV technical note 16/16 www.rohm.com 2010.04 - rev.c c 2010 rohm co., ltd. all rights reserved. ? ordering part number b d 9 1 5 2 m u v - e 2 part no. part no. package muv: vqfn020v4040 packaging and forming specification e2: embossed tape and reel ? order quantity needs to be multiple of the minimum quantity. datasheet d a t a s h e e t notice - ge rev.002 ? 2014 rohm co., ltd. all rights reserved. notice precaution on using rohm products 1. our products are designed and manufac tured for application in ordinary elec tronic equipments (such as av equipment, oa equipment, telecommunication equipment, home electroni c appliances, amusement equipment, etc.). if you intend to use our products in devices requiring ex tremely high reliability (such as medical equipment (note 1) , transport equipment, traffic equipment, aircraft/spacecra ft, nuclear power controllers, fuel c ontrollers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property (specific applications), please consult with the rohm sale s representative in advance. unless otherwise agreed in writing by rohm in advance, rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any ro hms products for specific applications. (note1) medical equipment classification of the specific applications japan usa eu china class class class b class class | class 2. rohm designs and manufactures its products subject to strict quality control system. however, semiconductor products can fail or malfunction at a certain rate. please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe desi gn against the physical injury, damage to any property, which a failure or malfunction of our products may cause. the following are examples of safety measures: [a] installation of protection circuits or other protective devices to improve system safety [b] installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. our products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditio ns, as exemplified below. accordin gly, rohm shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of an y rohms products under any special or extraordinary environments or conditions. if you intend to use our products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] use of our products in any types of liquid, incl uding water, oils, chemicals, and organic solvents [b] use of our products outdoors or in places where the products are exposed to direct sunlight or dust [c] use of our products in places where the products ar e exposed to sea wind or corrosive gases, including cl 2 , h 2 s, nh 3 , so 2 , and no 2 [d] use of our products in places where the products are exposed to static electricity or electromagnetic waves [e] use of our products in proximity to heat-producing components, plastic cords, or other flammable items [f] sealing or coating our products with resin or other coating materials [g] use of our products without cleaning residue of flux (ev en if you use no-clean type fluxes, cleaning residue of flux is recommended); or washing our products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] use of the products in places subject to dew condensation 4. the products are not subjec t to radiation-proof design. 5. please verify and confirm characteristics of the final or mounted products in using the products. 6. in particular, if a transient load (a large amount of load applied in a short per iod of time, such as pulse. is applied, confirmation of performance characteristics after on-boar d mounting is strongly recomm ended. avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading c ondition may negatively affect product performance and reliability. 7. de-rate power dissipation (pd) depending on ambient temper ature (ta). when used in seal ed area, confirm the actual ambient temperature. 8. confirm that operation temperat ure is within the specified range described in the product specification. 9. rohm shall not be in any way responsible or liable for fa ilure induced under deviant condi tion from what is defined in this document. precaution for mounting / circuit board design 1. when a highly active halogenous (chlori ne, bromine, etc.) flux is used, the resi due of flux may negatively affect product performance and reliability. 2. in principle, the reflow soldering method must be used; if flow soldering met hod is preferred, please consult with the rohm representative in advance. for details, please refer to rohm mounting specification downloaded from: http:/// datasheet d a t a s h e e t notice - ge rev.002 ? 2014 rohm co., ltd. all rights reserved. precautions regarding application examples and external circuits 1. if change is made to the constant of an external circuit, pl ease allow a sufficient margin considering variations of the characteristics of the products and external components, including transient characteri stics, as well as static characteristics. 2. you agree that application notes, re ference designs, and associated data and in formation contained in this document are presented only as guidance for products use. theref ore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in this document. rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. precaution for electrostatic this product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. please take proper caution in your manufacturing process and storage so that voltage exceeding t he products maximum rating will not be applied to products. please take special care under dry condit ion (e.g. grounding of human body / equipment / solder iron, isolation from charged objects, se tting of ionizer, friction prevention and temperature / humidity control). precaution for storage / transportation 1. product performance and soldered connections may deteriora te if the products are stor ed in the places where: [a] the products are exposed to sea winds or corros ive gases, including cl2, h2s, nh3, so2, and no2 [b] the temperature or humidity exceeds those recommended by rohm [c] the products are exposed to di rect sunshine or condensation [d] the products are exposed to high electrostatic 2. even under rohm recommended storage c ondition, solderability of products out of recommended storage time period may be degraded. it is strongly recommended to confirm sol derability before using products of which storage time is exceeding the recommended storage time period. 3. store / transport cartons in the co rrect direction, which is indicated on a carton with a symbol. otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. use products within the specified time after opening a humidity barrier bag. baking is required before using products of which storage time is exceeding the recommended storage time period. precaution for product label qr code printed on rohm products label is for rohms internal use only. precaution for disposition when disposing products please dispose them proper ly using an authorized industry waste company. precaution for foreign exchange and foreign trade act since our products might fall under cont rolled goods prescribed by the applicable foreign exchange and foreign trade act, please consult with rohm representative in case of export. precaution regarding intellectual property rights 1. all information and data including but not limited to application example contained in this document is for reference only. rohm does not warrant that foregoi ng information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. rohm shall not be in any way responsible or liable for infringement of any intellectual property rights or ot her damages arising from use of such information or data.: 2. no license, expressly or implied, is granted hereby under any intellectual property rights or other rights of rohm or any third parties with respect to the information contained in this document. other precaution 1. this document may not be reprinted or reproduced, in whol e or in part, without prior written consent of rohm. 2. the products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of rohm. 3. in no event shall you use in any wa y whatsoever the products and the related technical information contained in the products or this document for any military purposes, incl uding but not limited to, the development of mass-destruction weapons. 4. the proper names of companies or products described in this document are trademarks or registered trademarks of rohm, its affiliated companies or third parties. downloaded from: http:/// datasheet datasheet notice C we rev.001 ? 2014 rohm co., ltd. all rights reserved. general precaution 1. before you use our pro ducts, you are requested to care fully read this document and fully understand its contents. rohm shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny rohms products against warning, caution or note contained in this document. 2. all information contained in this docume nt is current as of the issuing date and subj ec t to change without any prior notice. before purchasing or using rohms products, please confirm the la test information with a rohm sale s representative. 3. the information contained in this doc ument is provi ded on an as is basis and rohm does not warrant that all information contained in this document is accurate an d/or error-free. rohm shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information. downloaded from: http:/// |
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